FPGA/RTL Design Engineer
Company Name:
Cinder Solutions
FPGA/RTL Design Engineer I, Santa Clara, CA
Cinder Solutions is looking fora solid FPGA/RTL Design Engineer to fill a position for one of our growing clients in Santa Clara, CA. This is a full time, 40 hour a week position that includes a full range of benefits like PTO and healthcare coverage.
Job Description:
FPGA target would be the current lead Altera products (e.g., Stratix 5) and potentially include the next-gen Altera products (e.g., Stratix 10). The core of the work is targeting the RTL to the two Altera architectures and closing timing. Near term is to take this to a pre-Si confidence point that the resource, power, and timing results are representative. If we cannot reach the frequency targets the employee would need to tune the RTL to try to reach the targets and look at alternatives to meet timing closure.
Job Requirement:
- Translation of an existing Verilog design to Altera FPGA fabrics, including timing closure/design modification/simulation/verification of the translation.
- Take an existing base of fairly generic Verilog and port to an Altera FPGA fabric.
- The RTL models a simple 100Gbps packet pipeline and runs at 480MHz and 160MHz and it represents the on-die portion of the design so there's no IO connections (the ends of the pipeline connect to a generic FIFO interface that would then talk to MACs).
- Convert existing test benches and enhance as necessary to test. This is not for production but would be to fully test and compare in Proof-of-Concept.
Primary Skills:
- FPGA design (RTL, P&R, timing analysis/closure, power analysis, etc.), Verilog RTL design and optimization, Altera tool chain and environment.
Secondary Skills:
- Networking, Packet Processing
The required skillset then would include:
- Familiarity with Altera FPGA design and tool chain and ability to optimize/tune RTL for an Altera FPGA.
- Strong design skills in general as depending on the tuning, this will likely involve more than simply running the RTL through the flow.
Shift Hours
8am-5pm
Shift Days
Monday-Friday
Travel: no
# Openings: 1
Desired Start Date: ASAP
Telecommute: No
Location: Santa Clara, CA
Pay: DOE
If you are looking for a professional, challenging, and stimulating environment, and meet the above criteria, please apply today!
US Citizens and all other parties authorized to work in the US are encouraged to apply. We are unable to sponsor at this time. No third party candidates considered for this position.
Additional Job Opportunities Available! Visit http://cindersolutions.com/ for a full listing.
About Cinder Solutions:
Cinder is a different kind of technical recruiting agency. Our focus on the long term success for our employees allows us to hire the most dedicated and talented Technical professionals in the industry. Unlike most agencies, Cinder directly hires our employees with competitive compensation, rich benefit packages and opportunities for growth and advancement. Because we are an engineering team at our core, we understand technology! We offer ongoing coaching and training opportunities as well as the ability to provide ?On the Bench? packages to qualified employees when an assignment ends.Estimated Salary: $20 to $28 per hour based on qualifications.
Cinder Solutions
FPGA/RTL Design Engineer I, Santa Clara, CA
Cinder Solutions is looking fora solid FPGA/RTL Design Engineer to fill a position for one of our growing clients in Santa Clara, CA. This is a full time, 40 hour a week position that includes a full range of benefits like PTO and healthcare coverage.
Job Description:
FPGA target would be the current lead Altera products (e.g., Stratix 5) and potentially include the next-gen Altera products (e.g., Stratix 10). The core of the work is targeting the RTL to the two Altera architectures and closing timing. Near term is to take this to a pre-Si confidence point that the resource, power, and timing results are representative. If we cannot reach the frequency targets the employee would need to tune the RTL to try to reach the targets and look at alternatives to meet timing closure.
Job Requirement:
- Translation of an existing Verilog design to Altera FPGA fabrics, including timing closure/design modification/simulation/verification of the translation.
- Take an existing base of fairly generic Verilog and port to an Altera FPGA fabric.
- The RTL models a simple 100Gbps packet pipeline and runs at 480MHz and 160MHz and it represents the on-die portion of the design so there's no IO connections (the ends of the pipeline connect to a generic FIFO interface that would then talk to MACs).
- Convert existing test benches and enhance as necessary to test. This is not for production but would be to fully test and compare in Proof-of-Concept.
Primary Skills:
- FPGA design (RTL, P&R, timing analysis/closure, power analysis, etc.), Verilog RTL design and optimization, Altera tool chain and environment.
Secondary Skills:
- Networking, Packet Processing
The required skillset then would include:
- Familiarity with Altera FPGA design and tool chain and ability to optimize/tune RTL for an Altera FPGA.
- Strong design skills in general as depending on the tuning, this will likely involve more than simply running the RTL through the flow.
Shift Hours
8am-5pm
Shift Days
Monday-Friday
Travel: no
# Openings: 1
Desired Start Date: ASAP
Telecommute: No
Location: Santa Clara, CA
Pay: DOE
If you are looking for a professional, challenging, and stimulating environment, and meet the above criteria, please apply today!
US Citizens and all other parties authorized to work in the US are encouraged to apply. We are unable to sponsor at this time. No third party candidates considered for this position.
Additional Job Opportunities Available! Visit http://cindersolutions.com/ for a full listing.
About Cinder Solutions:
Cinder is a different kind of technical recruiting agency. Our focus on the long term success for our employees allows us to hire the most dedicated and talented Technical professionals in the industry. Unlike most agencies, Cinder directly hires our employees with competitive compensation, rich benefit packages and opportunities for growth and advancement. Because we are an engineering team at our core, we understand technology! We offer ongoing coaching and training opportunities as well as the ability to provide ?On the Bench? packages to qualified employees when an assignment ends.Estimated Salary: $20 to $28 per hour based on qualifications.
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