RTL Design Engineer
Job Summary
Specify, design, and help in the verification and lab bring-up of advanced mixed-signal circuits (digital side)
Key Qualifications
Advanced knowledge of mixed signal conceptsAdvanced knowledge of RTL designAdvanced knowledge of Verilog and SystemVerilogAdvanced knowledge of front-end tools (Verilog simulators, linters, clock-domain crossing checkers)Good knowledge of synthesis, static timing, DFT, is a plusGood knowledge of SystemVerilog assertions, checkers, and other design verification techniques are a plusGood knowledge of scripting languages. Perl and Python are plussesGood communication and presentation skills
Description
Core
Responsibilities:
In this job you will be responsible for specifying and/or micro-architecting digital blocks in advanced mixed-signal circuits. YYou will be also responsible for RTL coding of blocks specified by you or others.You will participate in the design verification and bring-up of such blocks by writing relevant assertions, debugging code, and otherwise interacting with the design verification team.You will participate in the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Education
BS/MS
. Apply now!Estimated Salary: $20 to $28 per hour based on qualifications.
Specify, design, and help in the verification and lab bring-up of advanced mixed-signal circuits (digital side)
Key Qualifications
Advanced knowledge of mixed signal conceptsAdvanced knowledge of RTL designAdvanced knowledge of Verilog and SystemVerilogAdvanced knowledge of front-end tools (Verilog simulators, linters, clock-domain crossing checkers)Good knowledge of synthesis, static timing, DFT, is a plusGood knowledge of SystemVerilog assertions, checkers, and other design verification techniques are a plusGood knowledge of scripting languages. Perl and Python are plussesGood communication and presentation skills
Description
Core
Responsibilities:
In this job you will be responsible for specifying and/or micro-architecting digital blocks in advanced mixed-signal circuits. YYou will be also responsible for RTL coding of blocks specified by you or others.You will participate in the design verification and bring-up of such blocks by writing relevant assertions, debugging code, and otherwise interacting with the design verification team.You will participate in the lab bring-up of those circuits by potentially writing test scripts, analyzing lab data, proposing experiments, etc.
Education
BS/MS
. Apply now!Estimated Salary: $20 to $28 per hour based on qualifications.
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